/*
 * Source file for core processor functions.
 * 
 * CAR (Cool ARM Ripoff) copyright (c) 2026 David J Goeke. All rights reserved.
 * Unauthorized (re)distribution is prohibited.
*/

#include <time.h>
#include <unistd.h>
#include <stdio.h>
#include <assert.h>

#include "include/defs.h"

op_return_t dispatch(raw_instruction_t* r, pstate_t* state)
{
	uint8_t instruction_group = get_instruction_group(r);
	
	uint8_t opcode;
	
	switch (instruction_group)
	{
		case 0:
			opcode = convert_raw2misc(r).opcode;
			//assert(opcode < NUM_MISC_OPCODES);
			return misc_ops[opcode](r, state);
		case 1:
			opcode = convert_raw2register(r).opcode;
			return reg_ops[opcode](r, state);
		case 2:
			opcode = convert_raw2ls(r).opcode;
			return ls_ops[opcode](r, state);
		default:
			printf("\n[ERROR] instruction group is invalid\n");
			OP_RETURN_EXITING_ERROR
	}
	
	OP_RETURN_EXITING_ERROR
}

int processor_start(pstate_t* state)
{
	while (state->pc < state->memory_size)
	{
#ifdef _DEBUG
		printf("state->memory[pc] -> 0x%x, 0b%032b\n", state->memory[state->pc], state->memory[state->pc]);
#endif
		
		op_return_t rv = dispatch((raw_instruction_t*) (state->memory + state->pc), state);
		
		if (rv.do_inc_pc)
		{
			state->pc++;
		}
		else if (rv.exiting_error)
		{
			printf("An error was occured\n");
			return -1;
		}
		
		dump_regs(state);
		
		usleep(300000);
	}
	
	return 0;
}