70 lines
3.2 KiB
Plaintext
70 lines
3.2 KiB
Plaintext
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Instruction encoding for misc operations:
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instruction group: bits 0 to 1 (2 bits) {NOTE: for misc operations, should be set to 0b00}
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opcode: bits 2 to 7 (6 bits)
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imm: bits 8 to 31 {NOTE: depending on the opcode, could be an address, or a register indirection}
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Instruction encoding for register operations:
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instruction group: bits 0 to 1 (2 bits) {NOTE: for register operations, should be set to 0b01}
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opcode: bits 2 to 8 (7 bits)
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dest: bits 9 to 13 (5 bits)
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src1 bits 14 to 18 (5 bits)
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src2 bits 19 to 23 (5 bits)
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all other bits unused, however should be set to zero
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Instruction encoding for load/store operations:
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instruction group: bits 0 to 1 (2 bits) {NOTE: for load/store operations, should be set to 0b10}
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opcode: bits 2 to 5 (4 bits)
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register: bits 6 to 10 (5 bits)
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imm: bits 11 to 31 {NOTE: depending on the opcode, could be an address, or register indirect, or an immediate}
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is be one of:
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A) signed 21-bit offset from PC
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B) signed 21-bit offset from SP
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C) base register (5 bits) and a 16-bit signed offset from PC
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D) signed 21 bit immediate
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The difference between 'arithmetic' and 'logical' shifts/rotates is that in arithmetic shifts/rotates
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the sign bit is untouched, while logical shifts/rotates don't care about the sign bit.
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Also, we only need arithmetic shift right because arithmetic shift left is typically the same as a logical shift left.
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Another instruction we really don't 'need' is a rotate left instrction, because you can do the same thing with a rotate right
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instruction, and rotate right instructions are more common than rotate left instructions.
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opcodes for register operations (in order of opcode numbers):
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add; add src1 and src2 and store the result in dest.
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sub; subtract src1 and src2 and store the result in dest.
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mul; multiply src1 and src2 and store the result in dest.
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div; divide src1 and src2 and store the result in dest. If src1 or src2 is zero, dest is untouched and a exception is raised.
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mod; divide src1 and src2 and store the remainder in dest. If src1 or src2 is zero, dest is untouched and a exception is raised.
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shl; logically shift src1 left by src2 and store the result in dest.
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shr; logically shift src1 right by src2 and store the result in dest.
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ahr; arithmetic shift src1 right by src2 and store the result in dest.
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ror; logically rotate src1 right by src2 and store the result in dest.
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and; AND src1 by src2 and store the result in dest.
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or; OR src1 by src2 and store the result in dest.
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xor; XOR src1 by src2 and store the result in dest.
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not; NOT src1 and store the result in dest, ignore src2.
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xchg; exchange src1 and src2, ingore dest.
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opcodes for load/store operations: (in order of opcode numbers)
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ldr; load register from value at PC + imm
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lds; load register from value at SP + imm
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ldb; load register from value base_reg + imm
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ldi; load low 21 bits of register with value imm
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str; store register at address PC + imm
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sts; store register at address SP + imm
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stb; store register at address base_reg + imm
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ldh; load high 11 bits of register with value imm
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sti; store immediate at address PC + register
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stj; store immediate at address SP + register
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