diff --git a/drivers/ahci.c b/drivers/ahci.c new file mode 100644 index 0000000..af8c284 --- /dev/null +++ b/drivers/ahci.c @@ -0,0 +1 @@ +#include diff --git a/drivers/ehci.c b/drivers/ehci.c new file mode 100644 index 0000000..2543e69 --- /dev/null +++ b/drivers/ehci.c @@ -0,0 +1,29 @@ +#include + + +#define EHCI_BASE_ADDR 0xF0000000 // Example, your base address will be different + +// EHCI Register Offsets (from EHCI spec) +#define EHCI_CAPLENGTH_OFFSET 0x00 +#define EHCI_HCIVERSION_OFFSET 0x02 +#define EHCI_CONTROL_OFFSET 0x04 +#define EHCI_STATUS_OFFSET 0x08 +#define EHCI_COMMAND_OFFSET 0x10 + +// Registers access +uint32_t read_ehci_register(uint32_t* base, uint32_t offset) { + return *(volatile uint32_t*)(base + offset); +} + +void write_ehci_register(uint32_t* base, uint32_t offset, uint32_t value) { + *(volatile uint32_t*)(base + offset) = value; +} + +// Initialize EHCI controller +void initialize_ehci(uint32_t* base) { + uint32_t control = read_ehci_register(base, EHCI_CONTROL_OFFSET); + control |= (1 << 1); // Enable controller + write_ehci_register(base, EHCI_CONTROL_OFFSET, control); + + // Set up frame list pointer and other initialization steps as per EHCI specs +}