Espresso 0.0.2c
This commit is contained in:
225
drivers/idt.c
225
drivers/idt.c
@ -1,6 +1,11 @@
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#include <stdio.h>
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#include <port_io.h>
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#include <scheduler.h>
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#include <kernel/syscall.h>
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#include <drivers/irq.h>
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#include <drivers/idt.h>
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@ -29,8 +34,7 @@ typedef struct {
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} __attribute__((packed)) idtr_t;
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__attribute__((aligned(0x10)))
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static idt_entry_t idt[256]; // Create an array of IDT entries; aligned for performance
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static idt_entry_t idt[256]; /* create an array of IDT entries; aligned for performance */
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static idtr_t idtr;
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@ -38,91 +42,6 @@ static bool vectors[IDT_MAX_DESCRIPTORS];
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extern void* isr_stub_table[];
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__attribute__((noreturn))
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void exception_dispatcher(uint32_t int_no, uint32_t err_code)
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{
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switch (int_no)
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{
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case 0:
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printf("Divide by zero exception\n");
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break;
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case 13:
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printf("General Protection Fault: err=0x%x\n", err_code);
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break;
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case 14:
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{
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uint32_t cr2;
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asm volatile ("mov %%cr2, %0" : "=r"(cr2));
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printf("Page Fault at address: 0x%x, err=0x%x\n", cr2, err_code);
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break;
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}
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default:
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printf("Unhandled exception #%u, err=0x%x\n", int_no, err_code);
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break;
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}
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uint16_t cs, ds, es, ss;
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asm volatile ("mov %%cs, %0" : "=r"(cs));
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asm volatile ("mov %%ds, %0" : "=r"(ds));
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asm volatile ("mov %%es, %0" : "=r"(es));
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asm volatile ("mov %%ss, %0" : "=r"(ss));
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printf("CS=0x%04x DS=0x%04x ES=0x%04x SS=0x%04x\n", cs, ds, es, ss);
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asm volatile ("cli; hlt");
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/* Will never be reached */
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while (true)
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{
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asm volatile ("hlt" ::: "memory");
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}
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}
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void idt_set_descriptor(uint8_t vector, void* isr, uint8_t flags)
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{
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idt_entry_t* descriptor = &idt[vector];
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descriptor->isr_low = (uint32_t)isr & 0xFFFF;
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descriptor->kernel_cs = 0x08;
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descriptor->attributes = flags;
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descriptor->isr_high = (uint32_t)isr >> 16;
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descriptor->reserved = 0;
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}
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void pic_remap(void)
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{
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uint8_t a1, a2;
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/* Save masks */
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a1 = inb(PIC1_DATA);
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a2 = inb(PIC2_DATA);
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/* Start initialization sequence (in cascade mode) */
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outb(PIC1_COMMAND, 0x11);
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outb(PIC2_COMMAND, 0x11);
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/* Set vector offset */
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outb(PIC1_DATA, 0x20); /* IRQs 0-7 mapped to IDT entries 0x20-0x27 (32–39) */
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outb(PIC2_DATA, 0x28); /* IRQs 8-15 mapped to IDT entries 0x28-0x2F (40–47) */
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/* Tell Master PIC about Slave PIC at IRQ2 (0000 0100) */
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outb(PIC1_DATA, 0x04);
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/* Tell Slave PIC its cascade identity (0000 0010) */
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outb(PIC2_DATA, 0x02);
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/* Set 8086/88 mode */
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outb(PIC1_DATA, 0x01);
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outb(PIC2_DATA, 0x01);
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/* Restore saved masks */
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outb(PIC1_DATA, a1);
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outb(PIC2_DATA, a2);
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}
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void idt_init(void)
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{
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idtr.base = (uintptr_t)&idt[0];
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@ -136,13 +55,141 @@ void idt_init(void)
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extern void* irq_stub_table[];
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for (uint8_t i = 0; i < 16; i++)
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for (uint8_t i = 0; i < 20; i++)
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{
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idt_set_descriptor(32 + i, irq_stub_table[i], 0x8E);
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}
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asm volatile ("lidt %0" : : "m"(idtr)); /* load the new IDT */
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asm volatile ("sti"); /* set the interrupt flag */
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//asm volatile ("sti"); /* set the interrupt flag */
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}
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registers_t* interrupt_dispatcher(registers_t* regs)
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{
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if (regs->int_no < 32)
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{
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printf("external: %s, IDT/GDT: %s, ", ((regs->err_code & 0x0001) ? "true" : "false"), (regs->err_code & 0x0006) ? "IDT" : "GDT");
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printf("LDT: %s, selector: %x (%i)\n", ((regs->err_code & 0x0006) == 0b10) ? "true" : "false", regs->err_code & 0xFFF8, regs->err_code & 0xFFF8);
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printf("int: %i (%x), err: %i (%x)\n", regs->int_no, regs->int_no, regs->err_code, regs->err_code);
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exception_handler(regs);
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}
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else if (regs->int_no < 52)
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{
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uint32_t irq = regs->int_no - 32;
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regs = irq_handler(irq, regs);
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if (irq >= 8)
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{
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outb(0xA0, 0x20); /* acknowledge the IRQ to slave PIC */
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}
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outb(0x20, 0x20); /* acknowledge the IRQ to master PIC */
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}
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return regs;
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}
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__noreturn
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void exception_handler(registers_t* regs)
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{
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uint32_t int_no = regs->int_no;
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uint32_t err_code = regs->err_code;
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switch (int_no)
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{
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case 0:
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printf("Divide by zero exception (or other division error)\n");
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break;
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case 2:
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printf("NMI encountered\n");
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break;
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case 6: /* XXX: NOTE: this can be used to emulate instructions that do not exist on the current CPU :NOTE :XXX */
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printf("Invalid opcode encountered at %p\n", regs->eip);
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break;
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case 7: /* XXX: NOTE: use this for FPU emulation and for saving/restoring FPU registers in a multiprocessing enviroment :NOTE :XXX */
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printf("FPU instructions used, but FPU is nonexistant/disabled\n");
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break;
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case 8: /* double fault */
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printf("Double fault at %p, err %i\n", regs->eip, regs->err_code);
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break;
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case 13:
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printf("General Protection Fault: err=0x%x at %p\n", err_code, regs->eip);
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break;
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case 14:
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{
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uint32_t cr2;
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asm volatile ("mov %%cr2, %0" : "=r"(cr2));
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printf("PF addr=%p eip=%p err=%x\n", cr2, regs->eip, err_code);
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//printf("Page Fault at address: 0x%x, err=0x%x\n", cr2, err_code);
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break;
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}
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default:
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printf("Unhandled exception #%u, err=0x%x at %p\n", int_no, err_code, regs->eip);
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break;
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}
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uint16_t cs, ds, es, ss;
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asm volatile ("mov %%cs, %0" : "=r"(cs));
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asm volatile ("mov %%ds, %0" : "=r"(ds));
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asm volatile ("mov %%es, %0" : "=r"(es));
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asm volatile ("mov %%ss, %0" : "=r"(ss));
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if (((uint16_t) regs->cs != cs) || ((uint16_t) regs->ds != ds) || ((uint16_t) regs->es != es))
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{
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printf("segment register mismatch!\n");
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}
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printf("cs: 0x%x, ds: 0x%x, es: 0x%x,\nss: 0x%x, fs: 0x%x, gs: 0x%x\n", regs->cs, regs->ds, regs->es, ss, regs->fs, regs->gs);
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asm volatile ("cli; hlt");
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/* Will never be reached */
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while (true)
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{
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asm volatile ("hlt" ::: "memory");
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}
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}
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void idt_set_descriptor(uint8_t vector, void* isr, uint8_t flags)
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{
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idt_entry_t* descriptor = &idt[vector];
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descriptor->isr_low = (uint32_t) isr & 0xFFFF;
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descriptor->kernel_cs = 0x08;
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descriptor->attributes = flags;
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descriptor->isr_high = (uint32_t) isr >> 16;
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descriptor->reserved = 0;
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}
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void pic_remap(void)
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{
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uint8_t a1, a2;
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/* save masks */
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a1 = inb(PIC1_DATA);
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a2 = inb(PIC2_DATA);
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/* start initialization sequence (in cascade mode) */
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outb(PIC1_COMMAND, 0x11);
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outb(PIC2_COMMAND, 0x11);
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/* set vector offset */
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outb(PIC1_DATA, 0x20); /* IRQs 0-7 mapped to IDT entries 0x20-0x27 (32–39) */
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outb(PIC2_DATA, 0x28); /* IRQs 8-15 mapped to IDT entries 0x28-0x2F (40–47) */
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/* tell the master PIC about Slave PIC at IRQ2 (0000 0100) */
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outb(PIC1_DATA, 0x04);
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/* tell the slave PIC its cascade identity (0000 0010) */
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outb(PIC2_DATA, 0x02);
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/* set 8086/88 mode */
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outb(PIC1_DATA, 0x01);
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outb(PIC2_DATA, 0x01);
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/* restore saved masks */
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outb(PIC1_DATA, a1);
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outb(PIC2_DATA, a2);
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}
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