Espresso 0.0.2c
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177
files/idt.c
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177
files/idt.c
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#include <stdio.h>
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#include <port_io.h>
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#include <drivers/irq.h>
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#include <drivers/idt.h>
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#define IDT_MAX_DESCRIPTORS 256
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#define PIC1_COMMAND 0x20
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#define PIC1_DATA 0x21
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#define PIC2_COMMAND 0xA0
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#define PIC2_DATA 0xA1
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/*
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Most of the code is this file (and idt.h) are taken from the osdev wiki: https://wiki.osdev.org/Interrupts_Tutorial, though not all of it.
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*/
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typedef struct {
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uint16_t isr_low; // The lower 16 bits of the ISR's address
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uint16_t kernel_cs; // The GDT segment selector that the CPU will load into CS before calling the ISR
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uint8_t reserved; // Set to zero
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uint8_t attributes; // Type and attributes; see the IDT page
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uint16_t isr_high; // The higher 16 bits of the ISR's address
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} __attribute__((packed)) idt_entry_t;
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typedef struct {
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uint16_t limit;
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uint32_t base;
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} __attribute__((packed)) idtr_t;
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__attribute__((aligned(0x10)))
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static idt_entry_t idt[256]; // Create an array of IDT entries; aligned for performance
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static idtr_t idtr;
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static bool vectors[IDT_MAX_DESCRIPTORS];
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extern void* isr_stub_table[];
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void idt_init(void)
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{
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idtr.base = (uintptr_t)&idt[0];
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idtr.limit = (uint16_t)sizeof(idt_entry_t) * IDT_MAX_DESCRIPTORS - 1;
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for (uint8_t vector = 0; vector < 32; vector++)
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{
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idt_set_descriptor(vector, isr_stub_table[vector], 0x8E);
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vectors[vector] = true;
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}
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extern void* irq_stub_table[];
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for (uint8_t i = 0; i < 16; i++)
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{
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idt_set_descriptor(32 + i, irq_stub_table[i], 0x8E);
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}
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asm volatile ("lidt %0" : : "m"(idtr)); /* load the new IDT */
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asm volatile ("sti"); /* set the interrupt flag */
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}
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void interrupt_dispatcher(registers_t* regs)
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{
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if (regs->int_no < 32)
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{
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exception_handler(regs);
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}
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else if (regs->int_no < 48)
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{
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uint32_t irq = regs->int_no - 32;
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irq_handler(irq, regs);
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if (irq >= 8)
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{
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outb(0xA0, 0x20); /* acknowledge the IRQ to slave PIC */
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}
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outb(0x20, 0x20); /* acknowledge the IRQ to master PIC */
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}
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}
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__noreturn
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void exception_handler(registers_t* regs)
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{
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uint32_t int_no = regs->int_no;
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uint32_t err_code = regs->err_code;
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switch (int_no)
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{
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case 0:
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printf("Divide by zero exception (or other division error)\n");
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break;
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case 2:
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printf("NMI encountered\n");
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break;
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case 6: /* XXX: NOTE: this can be used to emulate instructions that do not exist on the current CPU :NOTE :XXX */
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printf("Invalid opcode encountered\n");
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break;
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case 7: /* XXX: NOTE: use this for FPU emulation and for saving/restoring FPU registers in a multiprocessing enviroment :NOTE :XXX */
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printf("FPU instructions used, but FPU is nonexistant/disabled\n");
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break;
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case 13:
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printf("General Protection Fault: err=0x%x at %p\n", err_code, regs->eip);
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break;
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case 14:
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{
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uint32_t cr2;
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asm volatile ("mov %%cr2, %0" : "=r"(cr2));
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printf("Page Fault at address: 0x%x, err=0x%x\n", cr2, err_code);
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break;
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}
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default:
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printf("Unhandled exception #%u, err=0x%x at %p\n", int_no, err_code, regs->eip);
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break;
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}
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uint16_t cs, ds, es, ss;
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asm volatile ("mov %%cs, %0" : "=r"(cs));
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asm volatile ("mov %%ds, %0" : "=r"(ds));
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asm volatile ("mov %%es, %0" : "=r"(es));
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asm volatile ("mov %%ss, %0" : "=r"(ss));
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printf("CS=0x%04x DS=0x%04x ES=0x%04x SS=0x%04x\n", cs, ds, es, ss);
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asm volatile ("cli; hlt");
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/* Will never be reached */
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while (true)
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{
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asm volatile ("hlt" ::: "memory");
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}
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}
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void idt_set_descriptor(uint8_t vector, void* isr, uint8_t flags)
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{
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idt_entry_t* descriptor = &idt[vector];
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descriptor->isr_low = (uint32_t) isr & 0xFFFF;
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descriptor->kernel_cs = 0x08;
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descriptor->attributes = flags;
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descriptor->isr_high = (uint32_t) isr >> 16;
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descriptor->reserved = 0;
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}
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void pic_remap(void)
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{
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uint8_t a1, a2;
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/* save masks */
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a1 = inb(PIC1_DATA);
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a2 = inb(PIC2_DATA);
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/* start initialization sequence (in cascade mode) */
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outb(PIC1_COMMAND, 0x11);
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outb(PIC2_COMMAND, 0x11);
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/* set vector offset */
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outb(PIC1_DATA, 0x20); /* IRQs 0-7 mapped to IDT entries 0x20-0x27 (32–39) */
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outb(PIC2_DATA, 0x28); /* IRQs 8-15 mapped to IDT entries 0x28-0x2F (40–47) */
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/* tell the master PIC about Slave PIC at IRQ2 (0000 0100) */
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outb(PIC1_DATA, 0x04);
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/* tell the slave PIC its cascade identity (0000 0010) */
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outb(PIC2_DATA, 0x02);
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/* set 8086/88 mode */
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outb(PIC1_DATA, 0x01);
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outb(PIC2_DATA, 0x01);
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/* restore saved masks */
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outb(PIC1_DATA, a1);
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outb(PIC2_DATA, a2);
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}
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