[BITS 32] [GLOBAL isr_stub_table] [GLOBAL irq_stub_table] [GLOBAL interrupt_entry] extern interrupt_dispatcher section .text ; ============================================================ ; COMMON INTERRUPT ENTRY ; ============================================================ interrupt_entry: ; Stack already contains: ; err_code ; int_no ; eip ; cs ; eflags pusha ; eax, ecx, edx, ebx, esp, ebp, esi, edi ;push ds ;push es ;push fs ;push gs push gs push fs push es push ds mov ax, 0x10 ; load kernel data selector mov ds, ax mov es, ax mov fs, ax mov gs, ax push esp ; pass pointer to registers_t call interrupt_dispatcher add esp, 4 pop gs pop fs pop es pop ds popa add esp, 8 ; remove int_no + err_code iret ; ============================================================ ; IRQ STUBS ; ============================================================ %macro IRQ 1 irq_stub_%+%1: push dword 0 ; fake error code push dword (32 + %1) ; vector number jmp interrupt_entry %endmacro IRQ 0 IRQ 1 IRQ 2 IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 IRQ 8 IRQ 9 IRQ 10 IRQ 11 IRQ 12 IRQ 13 IRQ 14 IRQ 15 irq_stub_table: %assign i 0 %rep 16 dd irq_stub_%+i %assign i i+1 %endrep ; ============================================================ ; EXCEPTION STUBS ; ============================================================ %macro ISR_NOERR 1 isr_stub_%+%1: push dword 0 ; fake error code push dword %1 ; interrupt number jmp interrupt_entry %endmacro %macro ISR_ERR 1 isr_stub_%+%1: push dword %1 ; interrupt number jmp interrupt_entry %endmacro ; Exceptions 0–31 ISR_NOERR 0 ISR_NOERR 1 ISR_NOERR 2 ISR_NOERR 3 ISR_NOERR 4 ISR_NOERR 5 ISR_NOERR 6 ISR_NOERR 7 ISR_ERR 8 ISR_NOERR 9 ISR_ERR 10 ISR_ERR 11 ISR_ERR 12 ISR_ERR 13 ISR_ERR 14 ISR_NOERR 15 ISR_NOERR 16 ISR_ERR 17 ISR_NOERR 18 ISR_NOERR 19 ISR_NOERR 20 ISR_NOERR 21 ISR_NOERR 22 ISR_NOERR 23 ISR_NOERR 24 ISR_NOERR 25 ISR_NOERR 26 ISR_NOERR 27 ISR_NOERR 28 ISR_NOERR 29 ISR_ERR 30 ISR_NOERR 31 isr_stub_table: %assign i 0 %rep 32 dd isr_stub_%+i %assign i i+1 %endrep